In this blog I will look at some of the drivers for the growth of RISC-V, its value proposition and explain why supporting RISC-V is important to Canonical. […]
So Risc-v is the open source instructional set? Does that mean it will be hard to port operating systems, utilities, games and whatnot to Risc-V? I think I saw a laptop using Risc-V recently.
I don’t know enough about OS programming to know if it is the architecture or the (closed source, as mentioned) CPU design itself that is more difficult to implement.
Looking at the MCU space, even with a known architecture (like ARM), each processor has to be individually implemented in software and firmware which is a ton of work, and the only people who necessarily know how are the processor designers unless it is open source. But take that with a big block of salt, because I have never done it, just looking at industry practices.
So Risc-v is the open source instructional set? Does that mean it will be hard to port operating systems, utilities, games and whatnot to Risc-V? I think I saw a laptop using Risc-V recently.
Yes, but also on the hardware level.
I don’t know enough about OS programming to know if it is the architecture or the (closed source, as mentioned) CPU design itself that is more difficult to implement.
Looking at the MCU space, even with a known architecture (like ARM), each processor has to be individually implemented in software and firmware which is a ton of work, and the only people who necessarily know how are the processor designers unless it is open source. But take that with a big block of salt, because I have never done it, just looking at industry practices.